Introduction

When the Union Cabinet approved Semicon 2.0 on 15 July 2026, it did not merely sanction another industrial scheme. It committed India to the most consequential act of economic self-definition since economic liberalisation in 1991 — the pursuit of technological sovereignty in semiconductors, the invisible backbone of every digital age device from a smartphone to a ballistic missile.

Semiconductors are not just chips. They are the leverage points of 21st-century power. Nations that can design, fabricate, and package chips domestically hold structural advantages in defence preparedness, artificial intelligence, telecommunications, and export competitiveness. India currently imports billions of dollars' worth of semiconductors annually, with 62% of electronic components coming from China alone. The strategic vulnerability this creates — economic, military, and diplomatic — is precisely what Semicon 2.0 is designed to address.

About the Topic

Background: ISM 1.0 — Building the Foundation

India's semiconductor journey in its modern form began in December 2021, when the Union Cabinet approved the India Semiconductor Mission (ISM 1.0) with a financial outlay of ?76,000 crore. The scheme offered project cost support of up to 50% to attract semiconductor fabrication plants (fabs), compound semiconductor units, display fabs, and design-linked incentive participants.

The results, while slow by some critics' standards, have been structurally transformative. By mid-2026, 12 manufacturing units have been approved under ISM 1.0, representing a cumulative investment of ?1.64 lakh crore. Three of these are already in commercial production:

-   Micron Technology (Sanand, Gujarat): India's first Made-in-India DRAM memory chip, now shipping to global clients including Dell.
-   CG Power + Renesas (Sanand): India's first end-to-end assembly and testing facility for power management chips.
-   Kaynes Semicon: Advanced ATMP (Assembly, Testing, Marking, and Packaging) operations for industrial and automotive chips.

The flagship project — Tata Electronics + Powerchip Semiconductor (Dholera, Gujarat) — represents India's first silicon fabrication plant (a "fab") capable of producing chips at the 28nm–110nm node range. With an investment of ?91,000 crore, it targets commercial production by December 2026. Additionally, Tata Electronics' ATMP facility at Jagiroad, Assam (?27,000 crore) will handle automotive-grade chip packaging for global supply chains.

In parallel, the Design Linked Incentive (DLI) sub-scheme catalysed 105 fabless semiconductor startups designing chips in India, backed by training infrastructure across 315 universities that have collectively trained 68,000 students in chip design using professional EDA (Electronic Design Automation) tools.

Semicon 2.0: The Cabinet Decision of July 2026

On 15 July 2026, the Union Cabinet approved Semicon 2.0 — formally called the next-generation India Semiconductor Mission — with a financial outlay of ?1,27,500 crore. This outlay surpasses ISM 1.0 by nearly 68%, signalling that India has moved from pilot to scale.

The defining conceptual shift between ISM 1.0 and Semicon 2.0 is this: ISM 1.0 focused on attracting large manufacturing facilities (fabs and ATMP units) as anchor investments. Semicon 2.0 builds the ecosystem around those anchors — the supply chain, the materials, the design IP layer, the research infrastructure, and the human capital pipeline — without which the anchors remain incomplete and import-dependent.

The Six Pillars of Semicon 2.0

1. Design  
India's 105 chip design startups represent a promising beginning, but the country aspires to become a "key semiconductor chip design IP nation." Semicon 2.0 expands support for fabless design companies developing semiconductor intellectual property (IP) blocks for strategic (defence, space) and commercial (automotive, consumer electronics, IoT) applications.

2. Machines and Materials  
This is the most strategically critical pillar. Semiconductor manufacturing relies on highly specialised equipment (lithography machines, etchers, deposition systems) and ultra-pure materials (photoresists, industrial gases, silicon wafers, specialty chemicals). Currently, India imports virtually all of these. Semicon 2.0 incentivises domestic companies to enter this precision manufacturing space, reducing the deepest layer of import dependency.

3. Fab Manufacturing (New Fabs)  
India's first fab (Tata-Powerchip, Dholera) is scheduled for 2028 commissioning. Semicon 2.0 aims to attract additional fabs — both silicon fabs and compound semiconductor fabs — to build redundancy and depth in India's manufacturing base.

4. ATMP/OSAT (Assembly, Testing, Marking, Packaging)  
Assembly and testing is the layer of chip manufacturing India has successfully entered via ISM 1.0. Semicon 2.0 pushes this further, targeting advanced ATMP technologies including 3D packaging (heterogeneous integration), which represents the frontier of chip packaging innovation.

5. Research and Development  
Current ISM-supported nodes operate at 28nm–110nm. These are "mature nodes" — reliable and commercially viable, but not at the technological frontier. Semicon 2.0 creates pathways toward more advanced nodes through structured collaboration between Indian research institutions and global semiconductor R&D centres, eventually reducing the gap with leading-edge technologies.

6. Talent Development  
The semiconductor industry is ferociously talent-intensive. Semicon 2.0 expands upon the 315 university framework, adding clean room training, fab construction training, and chip packaging skills to the existing chip design curriculum. The goal is to ensure that as India's fabs scale up capacity, they find a ready talent pipeline domestically rather than competing for scarce global expertise.

The Companion Scheme: MPMS

Semicon 2.0 was approved alongside the Mobile Phone Manufacturing Scheme (MPMS) worth ?62,500 crore — a sales-linked incentive scheme (2.25%–5% on eligible sales) running for five years. Together, the two schemes target ?39–40 lakh crore in total electronics production by 2031 and the creation of over 60,000 direct jobs. The strategic logic is vertical integration: phones made in India should increasingly run on chips made in India.

India's electronics manufacturing trajectory supports this ambition. Electronics manufacturing has grown sevenfold since 2014–15, electronics exports have grown elevenfold, India is now the world's second-largest mobile phone manufacturer, and 99.2% of mobiles sold domestically are made in India. The semiconductor mission is the next step in this ladder.

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The OAS Prism: Multiple Perspectives

Constitutional and Legal Dimension

• Semiconductor and electronics industrial policy sits squarely within the Union List of the Seventh Schedule to the Constitution. Entry 52 of Union List grants Parliament the power to legislate on industries whose control is declared by Parliament in public interest. The Industries (Development and Regulation) Act, 1951 provides the foundational legal framework for such control.
• The Directive Principles of State Policy are equally relevant. Article 39(b) directs the State to ensure that the ownership and control of material resources of the community are distributed to best serve the common good. In the semiconductor context, this principle extends to a nation's strategic technology resources — the ability to produce the chips that power its defence systems, power grids, and financial infrastructure is as much a "material resource" as land or minerals.
• Article 51 (Directive Principle on International Peace and Security) is also relevant given that semiconductor supply chain policy is deeply intertwined with India's foreign policy posture and its relationships with the US, Taiwan, Japan, and the European Union.
• Domestically, Semicon 2.0 operates under the framework established by the National Electronics Policy 2019 and builds upon the PLI (Production Linked Incentive) scheme architecture that has become the government's preferred industrial policy instrument since 2020. Unlike PLI's linear structure, Semicon 2.0's six-pillar ecosystem approach is closer in design to South Korea's CHIPS strategy of the 1980s and the US CHIPS and Science Act of 2022.

Economic Dimension

• India imports semiconductors worth tens of billions of dollars annually. The memory chip import surge alone grew by over 2,000% between FY2015–16 and FY2024–25. This import dependency is not merely an economic cost — it is a strategic liability. Every time a border conflict escalates with China (which supplies 62% of India's electronic components), India's manufacturing ecosystem faces potential disruption.
• Semicon 2.0 targets a structural transformation of this equation. The combined effect of ISM 1.0 and Semicon 2.0, when fully realised, would position India as the third largest semiconductor-capable economy in the Indo-Pacific (after Taiwan and South Korea), with manufacturing across the entire value chain — from chip design IP to final packaging.
• The domestic economic multiplier is significant. Each direct semiconductor job reportedly generates 3–5 indirect jobs in ancillary industries. The scheme's target of 60,000+ direct jobs, combined with MPMS employment, would represent a substantial addition to India's high-skill employment base — a category India has historically struggled to expand despite a large engineering graduate pool.
• For MSMEs, the "Machines and Materials" pillar opens an entirely new industrial sector. Semiconductor equipment manufacturing — making the machines that make chips — is among the highest value-added manufacturing activities in the world. If Indian MSMEs can enter even the periphery of this space (specialty gases, cleaning chemicals, packaging materials), the technology spillovers would benefit multiple other industries.

Social Dimension

• The most immediate social impact of Semicon 2.0 is on India's youth employment landscape. The semiconductor and electronics sector is unique in that it demands skilled workers at multiple tiers — VLSI engineers and chip designers at the top, diploma-holding technicians in ATMP units in the middle, and ITI-trained precision workers at the base.
• This layered demand makes semiconductor manufacturing particularly valuable as a social policy tool. The Tata ATMP facility in Jagiroad, Assam, and Odisha's 3D packaging unit are located away from traditional manufacturing corridors, potentially drawing skilled employment to eastern India and the Northeast — regions historically excluded from India's manufacturing growth story.
• The talent development pillar's focus on 315 universities also carries social significance. Training in chip design has historically been concentrated in IITs and elite institutions. Expanding EDA tool access and clean room infrastructure to regional universities democratises this pathway, potentially giving first-generation engineering graduates in Tier 2 and Tier 3 cities access to one of the world's most lucrative engineering careers.

Environmental Dimension

• Semiconductor manufacturing is chemically intensive and water-hungry. Chip fabs consume enormous quantities of ultra-pure water — a typical fab of modest capacity can use several million litres per day. Specialty chemical waste management — particularly for solvents, photoresists, and etchants — demands rigorous environmental controls.
• For India, where water table stress is already a growing concern in key states, the siting of semiconductor fabs requires careful environmental impact assessment. The choice of Dholera (Gujarat) and Jagiroad (Assam) for India's early fabs reflects partly geographical logic: access to water, power, and connectivity corridors.
• Conversely, the "mature node" focus of India's current fabs — operating at 28nm–110nm — means lower reliance on extreme ultraviolet (EUV) lithography, which itself involves complex chemical and radiation management challenges. India's strategic choice to start with mature nodes is thus not merely commercial logic but carries environmental prudence built in.
• The environmental dimension also connects to the clean energy transition: chips for solar panels, EV batteries, smart grids, and electric motor controllers are all semiconductors. India's ability to produce these domestically would directly support its climate commitments under the Paris Agreement and its target of 500 GW of renewable energy capacity by 2030.

Odisha Perspective

India's First Advanced 3D Semiconductor Packaging Unit is coming up in Odisha. The facility, set up by Heterogeneous Integration Packaging Solutions Pvt. Ltd. (subsidiary of 3D Glass Solutions Inc., USA) at Info Valley, Khordha district, Bhubaneswar, represents a genuine technological first for India. With a total project cost of ?1,943.53 crore (supported by ?799 crore from the Centre and ?399.5 crore from the Odisha government), this facility will produce:

-   70,000 glass substrate panels annually
-   50 million assembled semiconductor units
-   13,000 advanced 3D heterogeneous integration modules for AI, defence, 5G/6G, aerospace, automotive radar, and photonics applications

• Commercial production is slated to begin by August 2028, with full-scale volume production by August 2030. This is not a chip assembly unit in the conventional sense — 3D glass substrate-based packaging is at the technological frontier of the global semiconductor industry, used for next-generation AI chips, high-performance computing processors, and advanced defence electronics.
• Behind this achievement is Odisha's proactive policy posture. The state enacted the Odisha Semiconductor Manufacturing and Fabless Policy 2023, administered by the Odisha Computer Applications Centre (OCAC) under an Apex Committee chaired by the Chief Secretary. The policy's ambitions are specific and measurable: 100–120 chip design companies, 5,000–6,000 high-skill jobs, and at least two full chip designs annually. Its incentive package — 25–30% capital investment subsidy, 100% stamp duty exemption, 100% electricity duty exemption for 10 years, power tariff reimbursement at ?2 per unit, and ?20 crore per company for proof-of-concept phases — represents one of the most competitive state-level semiconductor incentive packages in India.
• Odisha's strategic advantages for semiconductors are worth examining. The state's large pool of engineering graduates (particularly from Bhubaneswar's technology corridor), its improving infrastructure (Bhubaneswar-Cuttack Smart City, Paradip port for logistics, and improving road-rail connectivity), and its government's demonstrated capacity to execute large industrial projects (as evidenced by the steel and mining sectors) make it a credible hub for semiconductor ATMP and fabless design.
• Semicon 2.0, with its expanded focus on ATMP and design IP, directly amplifies Odisha's existing investments. The Centre's enhanced financial commitments make it easier for Odisha's semiconductor projects to attract co-investment and global technology partners.

Opportunities

• India stands to gain substantially across multiple dimensions if Semicon 2.0 delivers on its framework.
• Strategic self-reliance is the foremost gain. A country that can produce chips for its defence systems, satellite communication networks, and power infrastructure is far more resilient to external coercion than one that cannot. China's use of rare earth export restrictions as a geopolitical instrument (2010, Senkaku Islands crisis) is a live precedent for how technology supply chains can be weaponised.
• High-skill employment at scale is the second major opportunity. The semiconductor and electronics value chain creates the kind of high-productivity, high-wage employment that India's demographic dividend demands. Engineering graduates in VLSI design earn salaries comparable to top IT services roles; technicians in ATMP units earn significantly more than workers in garment or low-tech manufacturing.
• Export diversification is the third dimension. Electronics became India's largest export category in 2025, overtaking traditional exports. Domestically produced chips would raise the value addition per unit of exported electronics, improving India's terms of trade and reducing the current account deficit pressure.
• Technology spillovers to other sectors — particularly defence, space, AI, and EVs — could be transformational. The Defence Research and Development Organisation (DRDO), ISRO, and India's AI startups currently depend on imported chips. Domestic chip production, even at mature nodes, would reduce both cost and the vulnerability to export controls imposed by foreign governments on cutting-edge technology.

Challenges

• Technological latency is the most structural challenge. Taiwan, South Korea, and the US are currently producing chips at 3nm and below. India's best near-term capability is 28nm, which is commercially viable but technologically dated. In sectors like AI accelerators and 5G baseband processors, advanced nodes below 5nm are becoming the standard. India's mature-node focus risks commercial obsolescence in the fastest-growing segments.
• Time-to-market pressure is acute. Semiconductor facilities take 5–7 years to build, equip, qualify, and reach yield. The global competitive landscape will shift substantially during this period. There is no guarantee that the niches India targets today will remain commercially viable when India's fabs reach full production.
• Ecosystem depth remains thin. India currently has few companies capable of producing semiconductor-grade gases, photoresists, or precision equipment components. Building this ecosystem requires not just financial incentives but the cultivation of specialised knowledge bases that take decades to develop. ISM 1.0's equipment gap — India imports virtually all fab equipment — has not been adequately addressed, and Semicon 2.0's "Machines and Materials" pillar faces this as its steepest climb.
• Water and power infrastructure at the scale semiconductor fabs require is not uniformly available across Indian states. The operational cost competitiveness of Indian fabs versus Taiwan, South Korea, or even Vietnam will depend on whether power tariffs, water access, and logistics costs can be managed sustainably.
• Talent pipeline constraints persist despite ISM 1.0's university programme. Training 68,000 students in chip design is a beginning — Taiwan's semiconductor ecosystem employs several hundred thousand engineers. The depth of specialised expertise at the doctoral and post-doctoral level needed for advanced R&D remains scarce in India.
• Geopolitical dependency in equipment is perhaps the sharpest irony. To build semiconductor sovereignty, India must first purchase equipment from ASML (Netherlands, EUV machines), Applied Materials (USA), Tokyo Electron (Japan), and Lam Research (USA) — all subject to export control regimes. India's access to the most advanced lithography tools is not guaranteed and depends on maintaining strong strategic partnerships with the West.

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Way Forward

• Several convergent recommendations emerge from policy research, industry consultation, and international best practices.
• Accelerate the "Machines and Materials" pillar first. Equipment and materials represent the most structurally vulnerable link in the chain. The government should designate a dedicated "Semiconductor Equipment Development Fund" with co-investment from PSUs like BEL and ECIL, which already have precision manufacturing competencies relevant to this sector.
• Strengthen state-centre coordination through the Semicon 2.0 governance framework. States like Odisha, Telangana, Karnataka, and Gujarat have enacted their own semiconductor policies. A National Semiconductor Coordination Council — analogous to the GST Council architecture — could align incentives, prevent subsidy wars, and standardise infrastructure norms across states.
• Invest in Materials Science and Chemical Engineering at central universities and NITs. India's semiconductor talent gap is not just in VLSI design but in the physical sciences that underpin fab operations — materials science, chemical engineering, plasma physics. UGC and DST should jointly create "Semiconductor Sciences" as a formal academic discipline with dedicated B.Tech and M.Tech tracks at NITs.
• Engage the Quad framework for technology access. India's ongoing US semiconductor partnership (including cooperation with Applied Materials and Intel) and Japan's support through JAXA-ISRO technology linkages should be extended to include explicit fab technology transfer agreements. The Comprehensive and Progressive Agreement for Trans-Pacific Partnership (CPTPP) membership consideration should factor in the semiconductor supply chain benefits it would provide.
• Support Odisha's semiconductor cluster with Centre-funded infrastructure. The Bhubaneswar semiconductor corridor — anchored by the 3D Glass Solutions facility and the Odisha Semiconductor Policy 2023 — should be designated a National Semiconductor Zone with plug-and-play infrastructure, dedicated power substations, ultra-pure water treatment plants, and a dedicated bonded logistics warehouse near Paradip port. This would significantly lower the entry barrier for global ATMP and design companies looking at eastern India.
• Establish a Semiconductor Wafer Fabrication Research Institute (SWFRI) under the Department of Science and Technology, modelled on South Korea's ETRI or Taiwan's ITRI. This institution should focus on developing India-specific process technologies at 28nm and gradually advancing to 14nm, creating the IP foundation for the next generation of Indian fabs.

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Conclusion

Semicon 2.0 is not a budget line item — it is a statement about what kind of economy India intends to become. Nations that control chip design and manufacturing control the commanding heights of the 21st-century economy in ways that no amount of services export or agricultural strength can compensate for.

India has earned the right to be taken seriously in this race. Its ISM 1.0 record — 12 projects, ?1.64 lakh crore, commercial production already underway in 36 months — compares favourably to the timelines of the US CHIPS Act investments, many of which remain delayed. Odisha's emergence as a 3D packaging hub adds a genuinely eastern Indian chapter to a story that has too long been centred on Gujarat and Karnataka.

The ?1.27 lakh crore committed under Semicon 2.0 will not buy chip sovereignty overnight. But it establishes, in unambiguous financial terms, that India is in this race to stay. For an aspirant trying to understand the India of the next decade, there is perhaps no more important policy development to internalise than this one.

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Mains Question

"India's Semiconductor Mission 2.0, with its six-pillar ecosystem approach and ?1.27 lakh crore outlay, represents a paradigm shift from attracting manufacturing anchors to building supply chain depth. Critically examine the strategic rationale behind this shift, the challenges India faces in achieving semiconductor self-reliance, and the role that states like Odisha can play in this national mission." (OPSC OAS Mains / UPSC GS Paper III — Science, Technology and Economy; 250 words)